Short Term Course on
Analog VLSI Design
October 20 – November 01,
2003
Introduction
CEP of IIT Bombay is announcing a 10-day course in the area VLSI Design. Microelectronics faculty of Electrical Engineering Department along with a faculty from IISc Bangalore, will be discussing basic design issues in VLSI Analog design. The course will have 4 hours of class work every day morning followed by design laboratory in the afternoon. To make the course more practical oriented, we are inviting CADENCE design tool company faculty to help us do this lab with their design tools.
Course
fee for this 10 day training will be Rs.20,000/- per student. This includes
Lunches/Tea and all the course material for ten days. So lets see Why in this digital era we are
looking for Analog designs.
Join
the Analog/ RF Design Wave!
In
the next 5 years, nearly 75% of System-on-chip (SOC) devices will contain
substantial analog ircuitry. ccording
to industry analyst IBS Corporation, mixed-signal SoCs accounted for approximately
20 percent of worldwide SoCs in 2001.
This represents a doubling in just three years. Further, the percentage is expected to rise
to nearly 75 percent over the next five years.
We are witnessing this revolution in <?XML:NAMESPACE PREFIX = ST1
/>India also with surging number of companies getting involved in Analog/RF
Designs, leading to demand and supply gap for skilled Analog/RF designers.
This
10-day training will be conducted at IIT Mumbai and is focused on the needs of
fresh engineers, who intend to work in Analog/RF design. Considering the serious intent of this
workshop and to maintain strict quality, IIT Mumbai would conduct this training
starting Oct 20,2003 for a batch of 20 corporate sponsored participants
only. During the training, Professors
AN Chandorkar and Dinesh Sharma, along with their respective teams from the
Department of Electrical Engineering, IIT Mumbai, will be taking 4 hours of
lecture sessions. Cadence faculty also
will be conducting 2.5 hours of Lab sessions everyday. Since there are limited seats the
registration would be on first-cum-first serve basis. Please send your registration request on or before Oct 1,
2003. The guest house accommodation is
on twin sharing basis and would cost ~ Rs 400/ per head per day and would
include lodging, Bed tea, breakfast and Dinner.
1.
Introduction analog VLSI and mixed signal issues in CMOS technologies.
2.
Basic MOS Models, SPICE Models and frequency dependent
parameters.
3.
Basic NMOS/CMOS Gain stage, and cascade circuits.
4.
Frequency response, stability and Noise issues in amplifiers.
5.
CMOS analog blocks: Current Sources and Voltage references
6.
Diffamp, OPAMP and OTA design.
7.
Frequency Synthesizers and Phased lock-loop.
8.
Non-linear analog blocks: Comparators, Charged-pump circuits and Multipliers
9.
Data converters
10.
Analog Interconnects
11.
Analog Testing and Layout
12
Low voltage and Low power Analog
Prof.
A.N.Chandorkar (32 Years of Experience)
Arun
N. Chandorkar is Professor of Electrical Engineering at Indian Institute of
Technology, Mumbai, India. He received the Ph.D. in Electrical
Engineering in 1977 from the University of Rajasthan while working at
C.E.E.R.I., Pilani. He has worked at CEERI Pilani, Tata Institute of
Fundamental Research. Currently his research interests include, VLSI Design
(Digital,Analog and RF VLSI ), VLSI Technology ,Radiation effects
in MOS devices and Circuits, Accelerated Testing of Electronic Components,
Optically Switched Microwave Semiconductor Components, Power Semiconductor
Devices & Power Electronic Systems and MEMS. He has contributed around 70
Technical papers in all the above areas. He has also interacted and
consulted many Industries in the areas of Electronics, VLSI Technology and VLSI
Design, including ControlNet,Sasken Communication Technologies, Texas
Instruments and Cypress Semiconductors. Recently he was invited by Govt. of
Japan to participate and address First Asian Workshop on Semiconductor Design
as Indian representative.
He has been honoured with IIT Bombay’s prestigious
"Excellence in Teaching" award (Best Teacher award) in
1999.Recently he was awarded "6th IETE S.V.C.Aiyya award for
his motivating research in Microelectronic Devices" by Institution of
Electronics and Telecommunication Engineers, India. He recently was conferred the Fellowship of Maharashtra Academy
of Sciences He is a Fellow of IETE, Vice President International Society of
Reliability Engineers (India Chapter), Fellow of Maharashtra Academy of Sciences
and Member of IEEE (USA).
Other
Professors (Profiles can be sent upon request):
Prof.
Dinesh Sharma (30 years --)
Prof.
Navakanta Bhat (8 years)
Prof.
J.Vasi (32 years----)
Prof.R.Lal (25 years---)
Prof.
Ramgopal Rao (10years---)
Prof.
M.B. Patil ( 12Years---)
For
Brief profiles of the Professors please visit IIT Mumbai's website
www.ee.iitb.ac.in/~microel
Reference
books:
Analog
VLSI -- B. Razavi
-- Boyce, Baker and Lee
Reference
journal:
IEEE Journal
of Solid State circuits
Prof.
A.N.Chandorkar,
Department
of Electrical Engineering,
Indian
Institute of Technology, Bombay,
Powai,
MUMBAI - 400 076.
Tel.
No.: 2576 7441 (O) 8441 (R)
Fax
No.: 2572 3707
Email:
anc@ee.iitb.ac.in